
Uart On Xilinx Fpga: Verilog Design, Vitis Software, Hardware
Published 3/2026
Created by Easy FPGA
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Level: Beginner | Genre: eLearning | Language: English | Duration: 15 Lectures ( 1h 20m ) | Size: 498 MB
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Fpga Embedded Design, Part 4 - Microprocessor Design
Last updated 1/2022
Created by Eduardo Corpeño, Marissa Siliezar
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz, 2 Ch
Level: Intermediate | Genre: eLearning | Language: English + subtitle | Duration: 129 Lectures ( 5h 26m ) | Size: 1.6 GB
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Pakdel M Mastering Verilog for FPGA Design From Fundamentals to Advanced 2026 | 56.24 MB
Title: Maker Innovations Series
Author: Pakdel, Majid
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Mastering Verilog for FPGA Design From Fundamentals to Advanced Digital Systems (PDF) | 52.89 MB
Title: Mastering Verilog for FPGA Design
Author: Majid Pakdel
Category: Nonfiction, Computers, Computer Hardware
Language: English | 404 Pages | ISBN: 9798868823114
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Hubbard K Mastering FPGA Chip Design 2024 | 19.41 MB
Title: Mastering FPGA Chip Design
Author: Kevin Hubbard;
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Pakdel M Fundamentals of VHDL for FPGA Programming Using Vivado 2026 | 35.81 MB
Title: Fundamentals of VHDL for FPGA Programming Using Vivado
Author: Simon Monk
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Learn Fpga Design With Vhdl : Driving An Lcd Display
Published 7/2025
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Language: English | Duration: 3h 31m | Size: 1.56 GB
Understand LCD display and build a VHDL controller from scratch with multiple Labs for practice
What you'll learn
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Fpga Timings P2: Clock Domain Crossing(cdc) With Vivado 2024
Published 7/2025
Created by Kumar Khandagle
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Level: Beginner | Genre: eLearning | Language: English | Duration: 133 Lectures ( 5h 8m ) | Size: 1.8 GB
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